31 Impulse C vs. VHDL for Accelerating Tomographic Reconstruction
32 Lossless image compression using adaptive lifting scheme Based on minimum entropy criterion
33 Message Encoding in Images Using Lifting Schemes
34 Multi-sensory system for obstacle detection on railways
35 New Approaches to Design Asynchronous Circuits on FPGAs
36 Pulse Propagation Along Single-Wire Electric Fences
37 Railway Wheel Tread Inspection by Ultrasonic Techniques
38 Smart Digital Door Lock for the Home Automation
39 SPIHT algorithm combined with Huffman encoding
40 System Level Simulation Guided Approach to Improve the Efficacy of Clock-gating
41 Transaction Level Modeling for Early Verification on Embedded System Design
42 An Efficient VLSI Architecture for Discrete Wavelet Transform based on the Daubechies Architecture
43 An Integrated Library Management System for Book Search and Placement Tasks
44 The Lifting Scheme for Wavelet Bi-Frames: Theory, Structure, and Algorithm
45 Speech Compression With Best Wavelet Packet Transform And SPIHT Algorithm
46 A New Digital Watermarking Scheme Based on Text
47 Significance of tree structures for zerotree-based wavelet video codecs
48 Design and implementation of mobile based electrical appliances control for industrial automation
49 Experiences Using the Xilinx Micro blaze Soft core Processor and uCLinux in Computer Engineering Capstone Senior Design Projects
50 Design and verification of various communication protocols on SOC
51 Hand Gesture Recognition System Based on Associative Processors real time
52 Implementation of an Embedded GPS Receiver Based on FPGA and Micro Blaze
53 Mean-square Performance of Selective Partial Update Sub-band Adaptive Filters
54 Design of Image Acquisition and Processing Based on FPGA
55 An efficient architecture for 2-D lifting-based discrete wavelet transform
56 Image Coprocessor: A Real-Time Approach Towards Object Tracking
57 HWSW Co-Simulation Platforms for VLSI Design
58 A Low Overhead Fault Detection and Recovery Method for the Faults in Clock Generators
59 Open-loop stepper motor driver based on FPGA
60 A High Level Language Approach to Matrix Converter Modeling and FPGA Controller Design
61 A Framework of Transaction-Based HW/SW Co-simulation for IC Verification
62 Real-time invariant textural object recognition with FPGAs
63 Design of Efficient Reversible Binary Subtractors Based on A New Reversible Gate
64 A HW/SW Co-Verification Technique for Field Programmable Gate Array (FPGA) Test
65 Simple Tuned Fuzzy Controller Embedded into an FPGA
32 Lossless image compression using adaptive lifting scheme Based on minimum entropy criterion
33 Message Encoding in Images Using Lifting Schemes
34 Multi-sensory system for obstacle detection on railways
35 New Approaches to Design Asynchronous Circuits on FPGAs
36 Pulse Propagation Along Single-Wire Electric Fences
37 Railway Wheel Tread Inspection by Ultrasonic Techniques
38 Smart Digital Door Lock for the Home Automation
39 SPIHT algorithm combined with Huffman encoding
40 System Level Simulation Guided Approach to Improve the Efficacy of Clock-gating
41 Transaction Level Modeling for Early Verification on Embedded System Design
42 An Efficient VLSI Architecture for Discrete Wavelet Transform based on the Daubechies Architecture
43 An Integrated Library Management System for Book Search and Placement Tasks
44 The Lifting Scheme for Wavelet Bi-Frames: Theory, Structure, and Algorithm
45 Speech Compression With Best Wavelet Packet Transform And SPIHT Algorithm
46 A New Digital Watermarking Scheme Based on Text
47 Significance of tree structures for zerotree-based wavelet video codecs
48 Design and implementation of mobile based electrical appliances control for industrial automation
49 Experiences Using the Xilinx Micro blaze Soft core Processor and uCLinux in Computer Engineering Capstone Senior Design Projects
50 Design and verification of various communication protocols on SOC
51 Hand Gesture Recognition System Based on Associative Processors real time
52 Implementation of an Embedded GPS Receiver Based on FPGA and Micro Blaze
53 Mean-square Performance of Selective Partial Update Sub-band Adaptive Filters
54 Design of Image Acquisition and Processing Based on FPGA
55 An efficient architecture for 2-D lifting-based discrete wavelet transform
56 Image Coprocessor: A Real-Time Approach Towards Object Tracking
57 HWSW Co-Simulation Platforms for VLSI Design
58 A Low Overhead Fault Detection and Recovery Method for the Faults in Clock Generators
59 Open-loop stepper motor driver based on FPGA
60 A High Level Language Approach to Matrix Converter Modeling and FPGA Controller Design
61 A Framework of Transaction-Based HW/SW Co-simulation for IC Verification
62 Real-time invariant textural object recognition with FPGAs
63 Design of Efficient Reversible Binary Subtractors Based on A New Reversible Gate
64 A HW/SW Co-Verification Technique for Field Programmable Gate Array (FPGA) Test
65 Simple Tuned Fuzzy Controller Embedded into an FPGA
